A plurality of CPU units (communication apparatuses) such as sequencers and servo controllers is generally provided in communication in an FA system, and these communication apparatuses are connected through a bus to use a time division mode, which allocates a slot acquired by dividing a predetermined cycle to each communication apparatus. Technologies related to a conventional communication system using the time division mode include patent document 1, patent document 2, and non-patent document 1. Patent document 1 discloses a technology of dividing a temporal resource of a serial bus by a plurality of communication apparatuses. Patent document 2 discloses a technology of executing transmission from a plurality of communication apparatuses in each cycle. Non-patent document 1 discloses a technology related to an isochronous packet transfer mode used for a standard time division mode in the FA area.
Patent Document 1: Japanese Patent No. 3566304
Patent Document 2: Japanese Patent Application Laid-Open No. 2005-293569
Non-Patent Document 1: IEEE 1394